The present invention relates to a semiconductor device, particularly, a semiconductor device in which electrodes of a semiconductor chip mounted on the front surface of an insulating substrate are electrically connected via through-holes to packaging electrodes provided on the back surface of the insulating substrate.
A BGA (Ball Grid Array) package has been known as one of packages for semiconductor devices such as ICs and LSIs. In the BGA package, a semiconductor chip is mounted on the front surface of a BGA substrate composed of an insulating substrate; ball-like electrodes are provided on the back surface of the BGA substrate; and electrodes of the semiconductor chip are electrically connected to the ball-like electrodes via a plurality of through-holes provided in the BGA substrate.
Compared with a package having a structure in which packaging leads project from side surfaces of the package, such a BGA package having ball-like electrodes as packaging electrodes disposed over the entire back surface of a BGA substrate has an advantage that a multi-pin structure can be adopted for mounting a semiconductor device on a wiring substrate without occupation of an additional space on the wiring substrate.
FIG. 2A is a sectional view of a related art BGA package, and FIG. 2B is a schematic top view of the BGA package shown in FIG. 2A. In these figures, reference numeral 1 indicates a semiconductor chip; 2 is Ag paste; 3 is a die pad for fixing the semiconductor chip 1; 4 is mold resin; 5 is a Au bonding wire; 6 is an inner lead; and 7 is a solder resist.
Reference numeral 8 indicates a BGA substrate made from a material shown in Table 1.
TABLE 1 ______________________________________ linear expansion coefficient (1/.degree. C.) prepleg (BT + glass cloth) copper ______________________________________ X: 1.4 .times. 1/10.sup.6 Y: 1.6 .times. 1/10.sup.6 1.6 .times. 1/10.sup.5 Z: 4.7 .times. 1/10.sup.6 ______________________________________
Reference numeral 9 indicates a plurality of through-holes provided in the BGA substrate 8. Each of the through-holes is formed of copper foil. Reference numeral 10 indicates a plurality of ball-like electrodes formed of solder balls, which are provided on the back surface of the BGA substrate 8. Here, as shown by hatching in FIG. 2B, the plurality of through-holes 9 are arranged outside a region 11 of the BGA substrate 8 in which the semiconductor chip 1 is mounted.
Incidentally, a semiconductor device having such a BGA package has a problem in causing barrel cracks upon a temperature cycle test performed after assembly of the semiconductor device, resulting in the degraded reliability.
The barrel crack is such a phenomenon that when a semiconductor device undergoes temperature changes by repeated cycles between a high temperature and a low temperature, copper foil of through-holes is disconnected due to a difference in thermal expansion coefficient between a prepleg constituting a BGA substrate and the copper foil. The occurrence of these barrel cracks possibly cuts off electric connection between electrodes of a semiconductor chip and ball-like electrodes.
FIGS. 3A to 3C are schematic views illustrating a mechanism of occurrence of barrel cracks. When a semiconductor device undergoes temperature changes by repeated cycles between a high temperature region A (for example, 150.degree. C.) and a low temperature region C (for example, -65.degree. C.), a prepleg and copper foil are both extended as shown by arrows in the high temperature region A; while they are both contracted as shown by arrows i the low temperature range C. As a result, there occur barrel cracks 12 due to a difference in thermal expansion coefficient between the prepleg and the copper foil.
FIGS. 4A to 4C are schematic views illustrating another mechanism of occurrence of barrel cracks. In an ordinary temperature region B (25.degree. C.), stress acts as shown by arrows due to a difference in thermal expansion coefficient between the prepleg and the copper foil, and thereby the BGA substrate 8 constituting the BGA package warps as shown in FIG. 4B and the mold resin 4 correspondingly warps. Specifically, a lower portion 8B of the BGA substrate 8 is contracted larger than an upper portion 8A of the BGA substrate 8 does, so that lower portions of the through-holes 9 warp inward. In the high temperature region A, the warping of the BGA substrate 8 is corrected and the BGA substrate 8 is flattened, so that the through-holes 9 are straightly kept. On the other hand, in the low temperature region C., the degree of the warping of the BGA substrate 8 becomes larger and the degree of the warping of the mold resin 4 correspondingly becomes larger, with a result that the lower portions of the though-holes 9 further warp inward.
In this way, when temperature changes are given to the semiconductor device, a larger extension/contraction force is applied to the lower portion 8B of the BGA substrate 8 as compared with the upper portion 8A of the BGA substrate 8. Further, the expansion/contraction force becomes larger at a position more apart from the center of the BGA substrate 8, and consequently a through-hole 9 positioned more apart from the BGA substrate 8 is applied to the larger stress. Accordingly, in the related art structure in which the plurality of the through-holes 9 are arranged outside the region 11 of the BGA substrate 8 in which the semiconductor chip 1 is mounted, there easily occur the barrel cracks 12.